1.6T Ethernet and Optical Networking: The Complete Guide to the Next Speed Tier for AI Data Centers
What 1.6 terabit Ethernet is, why AI clusters are pulling it forward, how the optics work (pluggable, linear, and co-packaged), what it costs in power and dollars, and when it actually ships.
Quick Answer: 1.6T Ethernet (1.6 terabits per second, or 1600GbE) is the next Ethernet speed tier after 800G, defined by the IEEE 802.3dj standard. It is built on 200 Gb/s per lane electrical and optical signaling (8 lanes × 200G), enabled by 224G SerDes and new 102.4 Tb/s switch ASICs. Its primary driver is AI training and inference clusters, where tens of thousands of GPUs demand more east-west bandwidth per rack than 800G can deliver efficiently. The biggest engineering challenge is not speed but power and reach — which is why 1.6T is arriving alongside new optical approaches: linear pluggable optics (LPO), co-packaged optics (CPO), and advanced silicon photonics. Early systems are shipping in 2025–2026, with volume deployment expected from 2026–2027.
Key Facts at a Glance
- 1.6T Ethernet = 1,600 Gb/s per port, double the bandwidth of 800G.
- Standardized by IEEE 802.3dj; electrical interfaces aligned with OIF CEI-224G.
- Lane rate: 200 Gb/s per lane using PAM4 modulation (8 lanes for 1.6T).
- Enabling switch silicon: 102.4T ASICs with 512 × 200G SerDes (e.g., Broadcom Tomahawk 6).
- Primary form factors: OSFP, OSFP-XD, and QSFP-DD1600 pluggable; CPO for highest density.
- Typical 1.6T pluggable DSP module power: roughly 25–30 W; LPO and CPO target 30–50%+ reductions.
- Primary use case: scale-out GPU fabrics in AI data centers; secondary: DCI and hyperscale spine layers.
What Is 1.6T Ethernet?
1.6T Ethernet is the Ethernet speed grade that delivers 1.6 terabits per second of throughput on a single port. It follows the historical doubling cadence of the Ethernet roadmap — 100G, 200G, 400G, 800G — but arrives faster than any previous generation because of one force: artificial intelligence.
The standard is being defined by the IEEE P802.3dj task force, which covers 200G, 400G, 800G, and 1.6T Ethernet over electrical backplanes, copper cables, and single-mode fiber at 200 Gb/s per lane. Complementary work from the Optical Internetworking Forum (OIF) defines the 224 Gb/s electrical interfaces (CEI-224G) that connect switch ASICs to optics. Together, these create the foundation for interoperable 1.6T hardware across vendors.
In practical terms, a 1.6T port can carry the traffic of sixteen 100G links or two 800G links. Inside an AI cluster, that translates to fewer cables, fewer optics, fewer switch tiers, and lower latency per bit moved.
Why AI Is Forcing the Jump From 800G to 1.6T
For two decades, Ethernet speed transitions were paced by general-purpose cloud traffic growth. AI broke that pattern. Three dynamics are pulling 1.6T forward:
1. GPU bandwidth is outrunning the network
Each new accelerator generation ships with faster NICs — 400G today, 800G next, 1.6T on the roadmap. A rack of eight GPUs can already present multiple terabits of scale-out demand. When the network becomes the bottleneck, expensive GPUs sit idle, which is the single largest destroyer of AI cluster economics.
2. Cluster size is exploding
Frontier training clusters now exceed 100,000 GPUs. Connecting that many endpoints with 800G requires more switch tiers and more optics, each adding latency, power, failure points, and cost. A 102.4T switch with 1.6T ports can flatten the topology — connecting the same number of GPUs with fewer hops and roughly half the optical modules.
3. Power is the binding constraint
In large AI fabrics, optics and SerDes can account for a significant share of networking power. Doubling bandwidth per port without doubling watts is the central design objective of the 1.6T generation — and the reason optical innovation is inseparable from this speed transition.
Note on figures: Power, cost, and timeline numbers in this article are industry-typical ranges drawn from vendor disclosures and analyst commentary. Actual values vary by vendor, reach, and configuration, and the IEEE 802.3dj standard remains in final stages at the time of writing. Verify specifications with suppliers before design decisions.
The Technology Stack Behind 1.6T
| Layer | 800G Generation | 1.6T Generation |
|---|---|---|
| Lane rate | 100 Gb/s per lane (8 × 100G) PAM4 | 200 Gb/s per lane (8 × 200G) PAM4 |
| SerDes | 112G SerDes (CEI-112G) | 224G SerDes (CEI-224G) |
| Switch ASIC | 51.2T (64 × 800G ports) | 102.4T (64 × 1.6T or 128 × 800G ports) |
| IEEE standard | 802.3ck / 802.3df | 802.3dj |
| Pluggable form factors | OSFP, QSFP-DD800 | OSFP (1.6T), OSFP-XD, QSFP-DD1600 |
| Common optical variants | DR8, 2×FR4, 2×DR4, SR8, VR8 | DR8 (200G/λ), 2×FR4, 2×DR4, SR8 early; LPO and CPO variants |
| Module power (DSP) | ~14–18 W | ~25–30 W (DSP); lower with LPO/CPO |
| Copper reach (DAC) | ~2–3 m passive | ~1–2 m passive; active copper (ACC/AEC) for longer in-rack links |
The Optical Networking Shift: Pluggable vs LPO vs CPO
At 1.6T, the conversation about Ethernet becomes a conversation about photonics. Copper runs out of reach at roughly one to two meters, so nearly every link beyond the rack is optical — and the way those optics are built determines power, density, cost, and serviceability. Three architectures are competing:
Traditional DSP-based pluggable optics
The incumbent model. A transceiver plugs into the switch faceplate and contains a digital signal processor (DSP) that re-times and cleans the electrical signal before converting it to light. Advantages: interoperable, field-replaceable, multi-vendor, mature supply chain. Disadvantages: the DSP consumes a large share of module power and adds latency; at 1.6T, a fully loaded 64-port switch can draw well over a kilowatt in optics alone.
Linear Pluggable Optics (LPO) and Linear Receive Optics (LRO)
LPO removes the DSP from the module entirely and relies on the switch ASIC's SerDes to do the signal equalization. LRO is a half-step that keeps a DSP on the transmit path but removes it on receive. Advantages: power savings often cited at 30–50% per module, lower latency, lower cost, still pluggable and serviceable. Disadvantages: tighter interoperability tolerances, dependency on host SerDes quality, and shorter supported reaches. LPO is gaining traction for short-reach, same-vendor AI fabric links where the ecosystem is tightly controlled.
Co-Packaged Optics (CPO)
CPO moves the optical engines off the faceplate and onto the switch package itself, sitting millimeters from the ASIC. Fiber exits the switch directly. Advantages: the shortest possible electrical path eliminates most SerDes and DSP power — vendors claim 3× or better efficiency improvements, plus higher port density and improved reliability from fewer lasers (often using shared external laser sources). Disadvantages: serviceability (a failed optical engine may mean a switch swap), vendor lock-in, thermal integration complexity, and an immature ecosystem. NVIDIA's Spectrum-X Photonics and Quantum-X Photonics switches and Broadcom's CPO-enabled Tomahawk platforms represent the first commercial wave.
| Criteria | DSP Pluggable | LPO / LRO | CPO |
|---|---|---|---|
| Relative power | Highest | Medium–low | Lowest |
| Latency | Highest (DSP re-timing) | Low | Lowest |
| Serviceability | Excellent (hot-swap) | Excellent (hot-swap) | Limited; improving with replaceable engines |
| Interoperability | Strong, multi-vendor | Moderate; host-dependent | Vendor-specific today |
| Reach | Short to long (SR to ZR) | Short reach focus | Short to medium reach |
| Maturity (2025) | Shipping | Early deployment | First commercial systems |
| Best fit | Multi-vendor fabrics, long reach, DCI | Dense same-vendor AI pods | Largest power-constrained AI clusters |
Photonics Technologies Enabling 200G Per Lane
Moving from 100G to 200G per optical lane is harder than it sounds. Several component technologies are competing to do it efficiently:
- Silicon photonics (SiPh) — integrates modulators, waveguides, and detectors on silicon wafers using CMOS fabs. Increasingly dominant for DR and FR reaches and the foundation of most CPO designs.
- EML lasers (electro-absorption modulated lasers) — the workhorse of 100G/lane; 200G/lane EMLs exist but face supply constraints and power challenges, opening the door for SiPh.
- VCSELs — low-cost multimode lasers for very short reach (SR); scaling to 200G/lane is difficult, pushing more short links toward single-mode or copper.
- Thin-film lithium niobate (TFLN) — an emerging modulator material offering very high bandwidth and low drive voltage, attractive for 200G and future 400G per lane.
- 3 nm PAM4 DSPs — next-generation DSPs (such as Marvell's 1.6T-class families) cut power per bit substantially compared with 5 nm predecessors, extending the life of the pluggable model.
- External laser sources (ELS) — centralized, replaceable laser modules feeding CPO engines, improving reliability and serviceability.
Where 1.6T Fits in the AI Data Center
| Network Segment | Role of 1.6T and Optical Technology |
|---|---|
| Scale-out GPU fabric (leaf/spine) | Primary target. 1.6T spine and 800G/1.6T leaf ports flatten topologies for 100k+ GPU clusters; LPO and CPO cut fabric power. |
| Scale-up (intra-rack GPU interconnect) | Dominated by NVLink, UALink, and emerging Ethernet-based scale-up proposals; 200G-lane copper and future optical I/O overlap heavily with 1.6T component technology. |
| Front-end and storage networks | Mostly 400G/800G today; 1.6T adoption follows as checkpointing and data-loading bandwidth grows. |
| Data center interconnect (DCI) | 800ZR/ZR+ coherent pluggable ship today; 1.6T ZR-class coherent optics are on the roadmap to link distributed AI campuses. |
| Hyperscale general cloud | Spine and core layers adopt 1.6T for aggregation efficiency; server access remains at lower speeds longer. |
1.6T Ethernet vs Alternatives
1.6T Ethernet does not exist in a vacuum. It competes and coexists with other AI interconnects:
- InfiniBand XDR (800G) and beyond — NVIDIA's InfiniBand roadmap tracks similar lane rates. The Ethernet ecosystem's advantage is multi-vendor supply and faster volume economics; InfiniBand's is tightly integrated, deterministic performance.
- Ultra Ethernet (UEC) — a transport-layer specification, not a speed. UEC runs on top of 800G and 1.6T physical layers and is a major reason hyperscalers are confident standardizing AI fabrics on Ethernet.
- Proprietary scale-up links (NVLink, UALink) — serve a different tier (inside the rack or pod). Expect convergence of component technology even as protocols stay distinct.
Challenges and Open Problems
- Power density. A 102.4T switch fully populated with DSP pluggable can approach or exceed 2 kW. Facilities, cooling, and rack power budgets must adapt — or the industry must shift toward LPO/CPO faster than planned.
- Signal integrity at 224G. PCB traces, connectors, and packages become loss-critical. Expect more flyover cables, cabled backplanes, and near-package connectors.
- Copper's shrinking reach. Passive DACs barely span a rack at 200G/lane. Active electrical cables add cost and power; optics everywhere else add more.
- Laser and component supply. 200G EMLs, high-quality silicon photonics wafers, and indium phosphide capacity are all constrained relative to AI-driven demand.
- Reliability at scale. With hundreds of thousands of optical lanes in one cluster, even small failure rates produce constant link flaps that stall training jobs. Telemetry, predictive failure detection, and fast failover are essential.
- Standards timing vs market timing. Vendors are shipping 1.6T ahead of IEEE 802.3dj ratification. Early adopters should plan for firmware updates and verify interoperability through forums such as the Ethernet Alliance and OIF plug fests.
- CPO serviceability and lock-in. Buyers must weigh dramatic power savings against reduced field-replaceability and single-vendor dependency.
Industry Roadmap: 2025 to 2028
| Period | Expected Milestones |
|---|---|
| 2025 | 102.4T switch ASICs announced and sampling; first 1.6T DSP pluggable and LPO modules; first CPO switch systems unveiled; 800G in volume for AI fabrics. |
| 2026 | IEEE 802.3dj targeted for completion; 1.6T-capable NICs ship with next-gen accelerators; hyperscaler and neocloud 1.6T spine deployments begin; CPO enters production at lead customers. |
| 2027 | 1.6T volume ramp; LPO and CPO take meaningful share in AI clusters; 1.6T coherent DCI optics emerge; 400G-per-lane research intensifies. |
| 2028+ | 3.2T Ethernet standardization work; 204.8T switch silicon; optical I/O extends toward the GPU package itself. |
Practical Guidance for Infrastructure Planners
- Design for 1.6T, deploy 800G where it's sufficient. Choose switches, fiber plant, and power infrastructure that can step up to 1.6T without a forklift.
- Standardize on single-mode fiber and parallel-fiber connectors (MPO-16/MPO-12). Multimode reach is collapsing at 200G/lane.
- Budget power per port, not just per switch. Optics can rival ASIC power; model it explicitly.
- Evaluate LPO for controlled, short-reach pods and keep DSP pluggable for multi-vendor or longer links.
- Treat CPO as a strategic decision. Pilot it where power is the hard limit, and negotiate serviceability and roadmap commitments.
- Invest in optical telemetry. Digital diagnostics, link-flap analytics, and predictive replacement protect multi-day training runs.
- Verify interoperability. Request plug fest results and run your own multi-vendor link testing before committing to volume.
Glossary of Key Terms
| Term | Definition |
|---|---|
| 1.6T Ethernet (1.6TbE) | Ethernet operating at 1.6 terabits per second per port, defined by IEEE 802.3dj. |
| PAM4 | Four-level pulse amplitude modulation that carries two bits per symbol, enabling 200G per lane. |
| SerDes | Serializer/deserializer circuits that move data between a chip and its I/O at high speed; 224G SerDes underpin 1.6T. |
| DSP (in optics) | A digital signal processor inside a transceiver that re-times and equalizes signals, improving reach at the cost of power and latency. |
| LPO | Linear Pluggable Optics — DSP-less transceivers that rely on the host ASIC for equalization to save power. |
| CPO | Co-Packaged Optics — optical engines integrated onto the switch package next to the ASIC. |
| OSFP-XD | An extended-density pluggable form factor supporting 16 lanes, enabling 1.6T or 3.2T per module. |
| DR8 / 2×FR4 | Optical reach classes: DR8 uses eight parallel single-mode fibers (~500 m); 2×FR4 uses wavelength multiplexing over duplex fiber (~2 km). |
| Silicon photonics | Fabrication of optical components on silicon wafers, enabling dense, low-cost photonic integration. |
Frequently Asked Questions
What is 1.6T Ethernet?
1.6T Ethernet is the Ethernet speed tier delivering 1.6 terabits per second per port. It is defined by the IEEE 802.3dj standard and built on eight lanes of 200 Gb/s PAM4 signaling, succeeding 800G Ethernet.
When will 1.6T Ethernet be widely available?
Early 1.6T switches and optics began appearing in 2025, with broader deployment expected in 2026 as IEEE 802.3dj is finalized and 1.6T-capable NICs ship. Volume adoption in AI data centers is anticipated from 2026 to 2027.
What is the difference between LPO and CPO?
LPO (linear pluggable optics) keeps a replaceable faceplate module but removes its DSP to cut power. CPO (co-packaged optics) integrates the optical engines directly onto the switch package, achieving the lowest power and highest density but with reduced serviceability and greater vendor dependence.
How much power does a 1.6T optical transceiver use?
A DSP-based 1.6T pluggable typically consumes roughly 25–30 watts depending on reach and vendor. LPO designs can reduce that substantially, and CPO implementations claim multi-fold efficiency gains per bit.
Why do AI data centers need 1.6T Ethernet?
AI training clusters with tens of thousands of GPUs generate enormous east-west traffic during collective operations. 1.6T ports allow flatter topologies with fewer switch tiers and optics, reducing latency, power, and cost per bit while keeping GPUs fully utilized.
Will copper cables still work at 1.6T?
Yes, but only for very short distances — roughly one to two meters for passive direct-attach copper at 200G per lane. Active electrical cables extend that modestly; beyond the rack, nearly all 1.6T links are optical.
Final Take
1.6T Ethernet is arriving faster than any previous Ethernet generation because AI has turned network bandwidth into a direct determinant of GPU utilization and return on investment. But the headline speed is only half the story. The real transformation is optical: the shift from power-hungry DSP pluggable toward linear optics and co-packaged photonics is redefining how switches are built, serviced, and powered.
For infrastructure planners, the message is clear — design fiber plant, power, and switching platforms for 1.6T today, make deliberate choices about LPO and CPO based on your power constraints and vendor strategy, and invest in the telemetry needed to run hundreds of thousands of optical lanes reliably. The data centers that get the optics right will be the ones whose GPUs never wait on the network.
